One is laying depth, the second is the soil temperature and the third is soil resistivity. Total derating factor = 0.95*0.9*0.91 =0.77, Then multiply this value by the cable current. The resulted current should be the current carrying capacity for the cable.

What is the derating factor?

The derating factor is applied to reduce the cable’s current carrying capacity. For example, if a X-90 cable can carry 40A @90 degrees, there may be additional factors which requires the cable to be de-rated such that it carries only 30A@90 degrees in the installation.

How is motor derating factor calculated?

New derated torque = Specified torque x √1 – (Ambient temperature – 40) / 100 For example with an ambient temperature of 76°C the new derated torque will be 0.8 x specified torque. Mounting arrangements The motor torque must be derated if the motor mounting surface is heated from an external source, such as a gearbox.

What is derating factor in power electronics?

Derating is a technique usually employed in electrical power and electronic devices, wherein the devices are operated at less than their rated maximum power dissipation, taking into account the case/body temperature, the ambient temperature and the type of cooling mechanism used.

What is derate factor in VLSI?

In OCV a fixed timing derate factor is applied to the delay of all the cells present in design so that in case of process variation affect the delay of any cells during the fabrication, it will not affect the timing requirements and chip will not fail after fabrication.

What derating means?

: to lower the rated capability of (something, such as an electrical or mechanical apparatus) because of deterioration or inadequacy.

What is derating factor in motor?

Motor derating: Any adverse operating conditions require that the motor performance be derated. These conditions include; ambient temperature above 40°C, motor mounting position, drive switching frequency or the drive being over sized for the motor. The slip is what allows an induction motor to produce torque.

What is derating why it is necessary it is same for all means for drives motors and cables?

Derating is a relative term. for cables ,drives and motors it is nomally related with term currrent w.r.to temperature etc. This data/details if given correctly allows user to use the same device with different rating(most of the times lower than rated) without having trouble to change it.

What is String efficiency and derating factor?

Derating Factor is the amount by which the string efficiency deviates from unity or 100%. The lesser the value of sting efficiency, the lesser will be voltage / current sharing by the individual SCRs. This means, more unused capacity will be available with the string and hence more DFR.

What is derating factor in transformer?

This factor is a function of the distribution of the current harmonic content. This way is defined the loss factor on a distribution transformer due to the current harmonics. For this standard the derating is obtained with the calculation of maximum current allowed in the distribution transformer.

What does derate mean in trucking?

Engine derating is the reduction of an engine’s output due to less-than-ideal operating conditions. Derating sometimes is done intentionally when you want to prolong the engine’s life and avoid substantial wear or damage.

What is OCV and AOCV?

AOCV stands for Advanced OCV and SBOCV stands for Stage Based OCV. To clarify the need for AOCV, consider two cases of single and multiple cells. Single cell in isolation exhibits larger delay variation compared to number of cells in a path. Using one number (as in OCV for all cells) in STA results in pessimism.

What is clock derating?

When you derate the setup analysis, you are increasing the delay on the data, so that it reaches even later. The clock is even faster due to 0.95 derate, so the chances of setup violations are greater than without any derate specified.

What is clock uncertainty in VLSI?

Clock Uncertainty: clock uncertainty is the difference between the arrivals of clocks at registers in one clock domain or between domains. The uncertainty can be used to model various factors that can reduce the clock period. It can define for both setup and hold.