When the VGS is zero the FET operates in saturation region and maximum current flows through it. Hence it is like a fully switched ON condition. Similarly, when the VGS applied is more negative than the pinch off voltage, FET operates in cutoff region and doesn't allow any current flow through the device.
What is the condition of JFET when maximum current will flow?
With no external Gate voltage ( VG = 0 ), and a small voltage ( VDS ) applied between the Drain and the Source, maximum saturation current ( IDSS ) will flow through the channel from the Drain to the Source restricted only by the small depletion region around the junctions.
Which part in FET controls the current flow?
FETs are devices with three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source.
