PLL circuits operate by comparing the phase of an external signal to the phase of a clock signal produced by a voltage controlled crystal oscillator (VCXO). The circuit then adjusts the phase of the oscillator's clock signal to match the phase of the reference signal.

How is PLL used as clock generator?

PLL clock generators are silicon IC with phase-locked loops that can generate different high-frequency outputs from a low frequency input reference. They are sometimes called phase-locked loops, or just PLLs, although the phase-locked loop is just one piece of circuitry that the device uses.

Why is there a clock in pretty little liars?

Clock distribution

The function of the PLL is to compare the distributed clock to the incoming reference clock, and vary the phase and frequency of its output until the reference and feedback clocks are phase and frequency matched.